From 3eaadf060ed28fdcfdbcb934d71b07b59947f5bd Mon Sep 17 00:00:00 2001
From: cxl <cxl@f0d560ea-af0d-0410-9eb7-867de7ffcac7>
Date: Tue, 17 Oct 2017 16:00:37 +0000
Subject: [PATCH] Core: CpuHypervisor

git-svn-id: svn://ultimatepp.org/upp/trunk@11387 f0d560ea-af0d-0410-9eb7-867de7ffcac7
---
 uppsrc/Core/Cpu.cpp                  | 24 +++++++++++++-----------
 uppsrc/Core/src.tpp/AppEnv$en-us.tpp |  6 ++++++
 2 files changed, 19 insertions(+), 11 deletions(-)

diff --git a/uppsrc/Core/Cpu.cpp b/uppsrc/Core/Cpu.cpp
index a7984688a..ee0d9ac46 100644
--- a/uppsrc/Core/Cpu.cpp
+++ b/uppsrc/Core/Cpu.cpp
@@ -1,10 +1,14 @@
 #include "Core.h"
-#include "cpuid.h"
-
 namespace Upp {
 
 #ifdef CPU_X86
 
+#ifdef COMPILER_MSC
+#include <intrin.h> 
+#else
+#include <cpuid.h>
+#endif
+
 static bool sHasMMX;
 static bool sHasSSE;
 static bool sHasSSE2;
@@ -16,17 +20,15 @@ static void sCheckCPU()
 	static bool done;
 	if(done) return;
 	done = true;
-	unsigned int eax, ebx, ecx, edx;
 	ONCELOCK {
+		unsigned int eax, ebx, ecx, edx;
 		#ifdef COMPILER_MSC
-			dword info1;
-			dword info2;
-			__asm {
-				mov eax, 1
-				cpuid
-				mov info1, edx
-				mov info2, ecx
-			}
+			int cpuInfo[4];
+			__cpuid(cpuInfo, 1);
+			eax = cpuInfo[0];
+			ebx = cpuInfo[1];
+			ecx = cpuInfo[2];
+			edx = cpuInfo[3];
 		#else
 			__get_cpuid(1, &eax, &ebx, &ecx, &edx);
 		#endif
diff --git a/uppsrc/Core/src.tpp/AppEnv$en-us.tpp b/uppsrc/Core/src.tpp/AppEnv$en-us.tpp
index 8848049b3..692ed6543 100644
--- a/uppsrc/Core/src.tpp/AppEnv$en-us.tpp
+++ b/uppsrc/Core/src.tpp/AppEnv$en-us.tpp
@@ -225,6 +225,12 @@ last argument [%-*@3 def].&]
 [s2;%% Returns true if CPU has SSE3 support.&]
 [s3; &]
 [s4; &]
+[s5;:Upp`:`:CpuHypervisor`(`): [@(0.0.255) bool]_[* CpuHypervisor]()&]
+[s2;%% Checks whether CPU has hypervisor flag set. If it has, the 
+program is running in virtual machine. Unfortunately, opposite 
+is not true `- some VMs run without this flag set.&]
+[s3; &]
+[s4; &]
 [s5;:CPU`_Cores`(`): [@(0.0.255) int]_[* CPU`_Cores]()&]
 [s2;%% Returns the number of cores the CPU has.&]
 [s3; &]